Chapter 3 Control of Timed Systems

In this Chapter we address the problem of controller synthesis for timed systems. By timed systems we refer to systems which are subject to quantitative (hard) real-time constraints. We assume the reader is familiar with the basics of Timed Automata theory, or has read Chapter 1 and Chapter 2 in this book. It is not always possible to use discrete time to specify and model timing constraints. This is why dense-time specification formalisms, like timed automata [ALU 94] or time Petri nets [MER 74] have been introduced some years ago. Once a system is modelled by a timed automaton or a time Petri net, it can checked (Chapter 2) for quantitative properties. If a property is not satisfied, we still might be able to act on the system and control some of its behaviours: for instance by adding a component, a controller. How to compute such a timed controller is the purpose of this Chapter in which we review some algorithms for controller synthesis for timed automata. A standard approach to the verification of real-time systems, called model checking [SCH 99], consists in 3 phases: (1) build a complete model S for the system (e.g. a finite automaton); (2) specify the qualitative correctness property to be satisfied in a non ambiguous logical language (e.g. temporal logics) as a formula ψ and (3) check Chapter written by Franck CASSEZ and Nicolas MARKEY.